The Future of Embedded Computing; a DARPA Perspective

Wednesday November 13, 13:40 (1:40pm), Halmstad University

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Today’s Defense missions rely on massive amounts of sensor data collected by intelligence, surveillance and reconnaissance (ISR) platforms. Not only has the volume of sensor data increased exponentially, there has also been a dramatic increase in the complexity of analysis required for applications such as target identification and tracking. The digital processors used for ISR data analysis are limited by power requirements, potentially limiting the speed and type of data analysis that can be done. Furthermore, as Moore’s Law slows down, power scaling has more or less stopped. The Microsystems Technology Office (MTO) at DARPA has two programs that directly target this problem: Power Efficiency Research For Embedded Computing Technologies (PERFECT) and Unconventional Processing of Signals for Intelligent Data Exploitation (UPSIDE). The PERFECT program is motivated by the observation that if we are to provide real-time situational awareness, we must improve the energy efficiency of on-platform computation. PERFECT attacks this problem within the digital CMOS domain at all levels, from devices up through algorithms. Near-threshold transistor operation is also a key feature of this technical approach. The UPSIDE program seeks to break the status quo of digital processing with methods of video and imagery analysis based on the physics of nanoscale devices. UPSIDE processing will be non-digital and fundamentally different from current digital processors and the power and speed limitations associated with them. Unlike traditional digital processors that operate by executing specific instructions to compute, it is envisioned that UPSIDE arrays will rely on a higher level computational element based on probabilistic inference embedded within a digital system.

About Prof. Dan Hammerstrom

Dan Hammerstrom joined DARPA as a Program Manager in March, 2012. He came to DARPA from Portland State University, where he is a Professor in the Electrical and Computer Engineering (ECE) department. He received a Doctor of Philosophy in Electrical Engineering from the University of Illinois at Urbana-Champaign in 1977. From 1977 to 1980, Dr. Hammerstrom was an Assistant Professor in the Electrical Engineering Department at Cornell University. In 1980 he joined Intel in Oregon, where he was involved in computer architecture and VLSI design. In 1988 he founded Adaptive Solutions, Inc., which specialized in high performance silicon technology (the CNAPS chip set) for image processing, neural network emulation, and pattern recognition. Dr. Hammerstrom is a Fellow of the Institute of Electrical and Electronic Engineers (IEEE) and has a joint appointment with Halmstad University, Halmstad Sweden.