Mike Butts on Kahn Process Networks in Silicon for Real-Time Embedded Systems

Tuesday October 15, 13:15 (1:15pm), Wigforssalen, Halmstad University

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The Kahn Process Network (KPN) is a well known but underused model of parallel computation, especially well suited to high performance real-time embedded computing. It combines low development and debug effort with efficiency, modular reuse, reliability and extreme scalability. A 336 processor KPN in a single silicon device, commercially released in 2007, found wide acceptance in real-time embedded video, computer vision, baseband wireless and medical imaging applications, as well as university research. A realtime medical X-ray system using thirty-two of these devices implemented a KPN with over ten thousand processors. Today's FPGAs are ideal silicon platforms for KPN implementations. This talk introduces the KPN and silicon KPNs, explores its characteristics and development process, and surveys embedded system applications and research. An open source hardware KPN implemented as an FPGA overlay is presented.

About Mike Butts

Mike Butts is a senior technologist in the verification group at Synopsys. He was chief architect at massively parallel processor vendor Ambric, a CPU architect at Nvidia, and co-founded FPGA vendor Tabula. Mike co-invented FPGA-based hardware logic emulation, and architected a number of reconfigurable FPGA and crossbar chips and system products at Quickturn and Cadence, where he was a Cadence Fellow. Mike has 50 US patents and ten IEEE published papers. His paper on the Ambric KPN architecture won a best-in-twenty-years award at IEEE's FCCM reconfigurable computing conference. His BSEE and MSEE/CS degrees are from M.I.T.

Doug Leith on Decentralised Constraint Satisfaction

Wednesday September 18, 13:15 (1:15pm), Wigforssalen, Halmstad University

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Several important resource allocation problems in wireless networks fit within the common framework of Constraint Satisfaction Problems (CSPs). These include channel allocation, power control, transmission scheduling and network coding. Inspired by the requirements of these applications, where variables are located at distinct network devices that may not be able to communicate but may interfere, we define natural criteria that a CSP solver must possess in order to be practical. We introduce a stochastic decentralized CSP solver, sketching how it provably finds a solution should one exist and illustrating its other desirable features. Using an implementation on a wireless testbed we demonstrate the decentralized solver's practical utility for one of the fundamental challenges in wireless networks, namely interference management by appropriate channel allocation.

About Prof. Doug Leith

Prof. Doug Leith is Director of the Hamilton Institute (www.hamilton.ie) at the National University of Ireland Maynooth, an applied mathematics research institute focussing on communication networks. Doug's research interests include network congestion control, coding/information theory, oprimisation and resource allocation in wireless networks.